Keynote: The FOPLP Revolution: Driving the Next Era of AI and HPC

下午 3:15 - 下午 3:40

As the global demand for AI, High-Performance Computing (HPC), and humanoid robotics accelerates, semiconductor wafer nodes continue to advance. However, the increasing I/O density and shrinking pitch of ICs have created a significant gap that traditional substrates struggle to bridge. Advanced packaging has therefore become the essential link to close this gap.

While many industry players focus on Wafer-Level Fan-out (FOWLP), PTI has pioneered Fan-out Panel-Level Packaging (FOPLP) using a 510x515mm panel format. This approach offers superior manufacturing efficiency and design flexibility to meet evolving market demands. PTI's FOPLP solution supports a broad spectrum of applications, from small I/O devices to complex heterogeneous and homogeneous multi-chiplet integrations.

Despite technical hurdles such as panel warpage control, die placement accuracy, and yield management, PTI has collaborated closely with materials and equipment partners to achieve successful mass production. Today, we are actively engaging in next-generation AI and HPC projects, leveraging FOPLP to enable a smarter, more connected future.

 

Key Technologies Covered

  • AI and HPC Applications
  • Chiplets in FOPLP
  • Heterogeneous integration in FOPLP
  • Panel level warpage control

Featured Speakers

Dr. Jim Lin

林基正博士

資深副總經理, 力成科技股份有限公司

Dr. Jim Lin currently serves as the Senior Vice President of Advanced Package Technology Development & Operation at Powertech Technology Inc. (PTI) and is a member of the Board of Directors for both PTI and Greatek Electronics Inc. With over 20 years of expertise in IC packaging technology, Dr. Lin spearheads PTI’s R&D and operational strategies, focusing on pioneering next-generation solutions.

Throughout his distinguished career, Dr. Lin has been instrumental in developing advanced technologies, including 32-chip memory stacking, System-in-Package (SiP), Package-on-Package (PoP), and Heterogeneous Multi-Chip Modules (MCP). He has also led significant breakthroughs in 3D TSV interconnection for High Bandwidth Memory (HBM) and Fan-out Panel Level Packaging (FOPLP). Under his leadership, PTI has solidified its position at the forefront of FOPLP innovation, driving industry-wide progress.

Dr. Lin earned his M.S. and Ph.D. in Power Mechanical Engineering from National Tsing Hua University.