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Keynote: Productizing TeraPHY Optical Engines – Challenges & Opportunities

下午 1:55 - 下午 2:35

The AI infrastructure build-out is driving unprecedented demand for bandwidth — and the semiconductor industry is reaching the limits of what electrical interconnects can deliver. Silicon photonics-based optical chiplets represent one of the most promising paths forward, offering the potential to dramatically reduce power consumption and latency while scaling I/O bandwidth. But productizing the promising technology requires confronting challenges the industry has not faced before.

Productizing optical engines demands more than silicon innovation. The back-end supply chain — process steps, equipment, and integration flows — does not yet exist in standardized form, and the ecosystem is still coalescing around competing approaches. Wafer-level test, a cornerstone of any yield and quality strategy, remains immature for photonic devices; throughput constraints today make it difficult to build the learning cycles that volume manufacturing requires. The optical connector, which defines the interface between chip and system, is still accumulating the reliability data that customers and supply chains need to commit at scale.

These are not insurmountable obstacles — they are the defining work of this moment. Organizations that invest now in building test infrastructure, qualifying supply chains, and establishing reliability benchmarks will be positioned to lead as optical I/O becomes mainstream. This talk will share candid perspective on where the gaps are, what progress looks like, and why the opportunity is worth the difficulty.

 

Key Technologies Covered

  • Electro-optical Wafer Sort
  • Connectorization approaches for CPO
  • Data infrastructure for high performance supply chain

Featured Speakers

Mr. Vivek Khanzodé

Mr. Vivek Khanzodé

Vice President of Engineering, Ayar Labs

Vivek Khanzode is Vice President of Engineering at Ayar Labs, where he leads the productization and manufacturing of optical chiplet technologies for AI and data center applications. With more than 30 years of semiconductor industry experience, he has held senior engineering leadership roles at Marvell Technology, leading global teams responsible for systems engineering, silicon validation, applications engineering, and customer enablement across storage and accelerated computing products. He is recognized for building world-class engineering organizations, improving product quality and execution, and bringing complex semiconductor technologies to market at scale. He has a Master of Science in Electrical Engineering (VLSI) from Clemson University.