Enabling the Next Era of Heterogeneous Integration with Panel-Level Packaging Innovation and Commercialization
Advanced packaging has become the new scaling engine for the semiconductor industry. The rapid adoption of AI is accelerating demand for larger package formats, higher interconnect density, and more complex heterogeneous integration schemes that combine logic, memory, and co-package optics within a single system. Meeting these requirements will require manufacturing platforms that can scale beyond the limitations of traditional wafer-based processing.
Panel Level Packaging represents a significant architectural shift by extending semiconductor packaging processes onto larger panel formats, creating a pathway to higher throughput, improved cost efficiency, lower environmental impact, and support for future package dimensions that may be impractical on wafer-scale carriers. At the same time, realizing semiconductor-class density at panel scale requires breakthroughs in lithography, materials engineering, substrate technology, inspection, process integration, and manufacturing control.
Applied Materials is advancing this transition through a co-innovation and commercialization strategy built on deep collaboration across the semiconductor ecosystem. By combining new materials, differentiated process technologies, and a broad panel packaging equipment portfolio, the industry can accelerate development of fine-line RDL, advanced substrates, glass-core architectures, and next-generation interconnect technologies needed to support future AI and HPC platforms. This talk explores the technology roadmap, critical innovation challenges, and commercialization pathways shaping the future of panel-based heterogeneous integration.
Key Technologies Covered
- Panel-Level Packaging (PLP)
- Large Panel Form-Factor 510x515mm
- Advanced Substrate Build-Up Scaling
- Fine-Line RDL Panel Integration
- Through-Glass Via (TGV) Enablement
- Process Co-Optimization and Co-Innovation