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Digitho Technologies

Mr. Richard Beaudry, CEO, Digitho Technologies

25 years' experience in semiconductor industry as CEO, CTO, MEMS consultant, process integrator, and process scientist. Author of 8 patents. 

An entrepreneur bringing innovations in the semiconductor industry

 

 

 

 

 

Topic:

High-Volume Direct-Write Technology for High-Density Chiplet Interconnects in Advanced Packaging.

 

Abstract:

The performance ceiling for modern AI chips is increasingly set not by compute, but by the interconnects between dice. 3D packaging approaches—hybrid bonding, micro-bump stacking—deliver excellent bandwidth but remain constrained by yield and cost, limiting their reach into cost-sensitive consumer applications. This constraint is becoming critical as Physical AI—embedding intelligence into robotics, autonomous vehicles, and smart manufacturing—demands high-bandwidth, chip-to-chip communication at price points incompatible with today's advanced packaging.

Side-by-side interconnection through substrates or reconstructed wafers (e.g., Fan-Out Wafer Level Packaging) is the dominant approach for chiplet integration in consumer electronics, but achievable bandwidth is bounded by lithographic resolution limits and die-placement tolerances.

This work presents a dynamic reprogrammable photomask that enables direct-write, adaptive patterning within standard i-line photolithography systems—compatible with existing production infrastructure and requiring no equipment modification. The technology dynamically compensates for die misplacement, allowing finer, higher

density interconnect geometries than fixed-mask processes permit. Demonstrated results include 456 nm resolution at throughput comparable to conventional fixed-photomask lithography.

By decoupling interconnect bandwidth from the cost structure of 3D packaging, this approach offers a manufacturing-ready path toward the high-performance, low-cost chip-to-chip communication that Physical AI applications will require at scale.

 

Key Technologies Covered:

  • Direct-write lithography at scale.
  • Chiplet to-chiplet adapted interconnects for high-bandwidth communication needed in AI-Devices.
  • Advanced Packaging process for cost-driven requirements in Physical AI. 
  • AI-Chips