Keynote: Accelerating the Evolution of NAND Flash Memory with Bonding Technologies

1:35 pm - 2:00 pm

NAND flash memory was invented in 1987 by KIOXIA (formerly known as TOSHIBA Memory) and has been evolving for about four decades. Continuous improvement in bit density has been achieved through 2D and subsequent 3D scaling, overcoming trade-offs in performance. While 3D scaling will continue to drive higher bit density, the transition from a monolithic die to a multi-die approach contributes to improved performance with fewer constraints. CBA (CMOS directly Bonded to Array) technology, introduced in the 8th generation of BiCS FLASH, enhances the flexibility of process optimization and improves the lead time for new products by separating a monolithic die into the CMOS die and the array die, and bonding them through wafer-to-wafer copper direct bonding. Expanding the range of bonding technologies being introduced will help us meet increasing requirements such as higher bandwidth, more functions in memory, and lower power consumption as well as higher bit capacity. Multi die stacking of CMOS dies provides greater flexibility for computing functions in memory. Multi die stacking of array dies accelerates the increase in bit density per unit area. Die-to-wafer(die-to-die) bonding eliminates restrictions on chip sizes that can be bonded, and it allows for the bonding KGD (Known Good Die) after testing. In this talk, we will review process options for bonding technology and discuss potential advantages of multi die bonding in various applications.

Key Technologies Covered

Advantages of wafer-to-wafer bonding for NAND flash memory
Advantages of die-to-wafer bonding for NAND flash memory
Bonding process options for NAND flash memory

Featured Speakers

Mr. MASAHIRO INOHARA

Chief Specialist, KIOXIA Corporation

Masahiro Inohara is the Chief Specialist at KIOXIA Corporation, currently involved in advanced packaging development and planning. He has over 30 years of experience in the semiconductor industry and began his career as a process and device development engineer for logic, SRAM, and analog ICs at TOSHIBA Corporation (the original company from which KIOXIA spun out). After serving for 2 years in the corporate strategy department, he moved to NAND flash memory division, where he developed 3D NAND flash memory across several generations, including hybrid bonding technology. He holds over 54 patents and has authored more than 14 publications. He received his B.S. and M.S. degrees in engineering science from Tsukuba University, Ibaraki, Japan, in 1991 and 1993, respectively.