Frontiers of Plasma etch technologies to enable 3D devices for AI applications

Artificial intelligence is ushering in a new era of computing—one defined by unprecedented demand for compute performance, memory bandwidth, and energy efficiency. Meeting this inflection point will require more than incremental progress; it will require a fundamental transformation in semiconductor device architecture. Across logic, DRAM, and NAND, the industry is accelerating toward a three-dimensional future. 3D NAND has already established the blueprint for non-volatile data storage. In logic, FinFET introduced three-dimensional structures, while gate-all-around (GAA) and complementary FET (CFET) architectures will extend the path toward true 3D scaling. In DRAM, high-bandwidth memory (HBM) is advancing 3D integration at the package level, while chip-level 3D DRAM is emerging as the next frontier.

In this transformation, plasma etch is becoming one of the defining enablers of the AI era. The challenge is no longer simply to etch smaller features, but to precisely create the complex, densely packed, high-aspect-ratio structures that will determine the performance, power, and yield of next-generation devices. Success demands a new class of plasma etch innovation — more powerful, more precise, more productive, and more intelligent. This presentation will explore how the latest advances in plasma etch technology are shaping the manufacturing foundation for the next generation of 3D semiconductor devices and the future of AI-driven computing.

Key Technologies Covered

• 3D device architectures across logic, DRAM, and NAND
• Advanced plasma etch for high-aspect-ratio structures
• Precision etch for performance, power, and yield