Keynote Speech: AI at Scale — Rethinking Networking, Optics and Packaging

Artificial intelligence is reshaping the semiconductor and infrastructure landscape at an unprecedented pace, driving a fundamental transformation in how computing systems are architected. As AI clusters scale from thousands to millions of interconnected accelerators, networking is no longer just connective tissue — it has become a primary determinant of system performance, scalability, and power efficiency. 

This keynote explores the critical role of next-generation AI interconnect technologies across scale-up, scale-out, and emerging scale-across architectures. The presentation will examine how explosive AI model growth is accelerating bandwidth requirements beyond historical semiconductor scaling trends, compressing the traditional two-year doubling cycle toward an 18-month cadence driven by AI deployment demands. 

Meeting these requirements requires innovation far beyond conventional networking silicon. Advanced packaging technologies — including co-packaged optics, 2.5D integration, and 3D multi-die architectures — are becoming foundational enablers for delivering higher bandwidth density, lower power per bit, and scalable system connectivity. These technologies are redefining how bandwidth is brought into and across the chip, while enabling disaggregated and modular AI infrastructure at massive scale. 

The keynote will discuss the convergence of networking, silicon, optics, and packaging, and how this convergence is shaping the future of AI infrastructure. It will also highlight the engineering challenges and opportunities in building interconnect platforms capable of supporting the next decade of AI growth. 

The AI era will not be enabled by compute alone. It will be enabled by the network.