Martin Snelgrove

Martin Snelgrovetaught Electronics at the University of Toronto and at Carleton University, where he held an NSERC Chair and worked with Ottawa tech companies. He has had technical leadership and founder roles at half a dozen companies, including most recently Untether AI, and is now CEO of Hepzibah AI.

Theme: Efficient AI Cores: Scalable from Edge to Cloud

Abstract of Presentation

AI workloads are dominantly high-dimensional linear algebra, exhibiting “embarrassing parallelism”; power consumption is limiting both cost-effectiveness and throughput; and technology scaling is making chip design a slow and expensive process. This combination of math and physics is driving accelerator architecture to a tiled at-memory model, but software development and business FOMO pace are freezing production environments around traditional GPUs. The newer architectures have yet to standardize, aggravating the software problem.

Tiled architectures are inherently scalable, roughly in quanta of 1TOPS and 100kB-1MB. Applications substantially below that quantum may be better served by classical CPUs or by neuromorphic techniques.

Key Technologies Covered

• Tiled At-Memory Accelerator Architectures for scalable AI compute (1TOPS, 100kB–1MB tiles)
• Energy-Efficient Linear Algebra Processing using parallelism in AI workloads
• Limits of GPU-Dominated Production Environments in the face of architectural innovation
• Hardware–Software Co-Design & Standardization Challenges in next-gen AI systems