SiP Global Summit 2019 – Heterogeneous Integration NOW & FUTURE – Day 2

Grand Ballroom, Grande Luxe Banquet, 3F, Building A, CTBC Financial Park Thursday, September 19
8:15am to 5:00pm

Date:Thursday, September 19th, 2019
Time:08:15 - 17:00 (08:15-08:45 for registration)
Venue:Grand Ballroom, Grand Luxe Banquet, 3F, Building A, CTBC Financial Park
Theme: AI/5G-driven High Performance Computing, from Cloud to Edge

Forum Chair:



With the arrival of data-centric era, we are unconsciously immersed in and guided by ubiquitous data generation and processing in our daily life; from remote cloud, data centers, networks, to fleet of personal and sensing devices such as smartphone, wearables, visual monitoring, vocal controls, and smart surveillance. This spurs strong demands on semiconductor logics, memories, and wireless connectivity for data generation, storage, processing, and communication. To meet the escalating demands on data bandwidth and smart computing, the semiconductor industry has re-invented packaging and system integration technologies by providing cost effective solutions in all application domains.

While Moore’s Law transistor scaling continues, semiconductor market has evolved from device centric to data centric. To address market needs, system packages through heterogeneous integration has taken the driver’s seat and  propel system performances toward smart computing, wide data bandwidth, small form factor, with low or zero latency and energy efficiency. And all these are capped by ever better system cost per function as technology and product migrate from generation to generation.

In this forum, speakers from renowned academician, research institute, Design House, EDA tool, foundry, and manufacturing/materials suppliers are sharing their insights and visions. Audience would benefit from this forum to have an in-depth understanding on following subjects

  • Data centric high performance computing industry trends
  • System integration and packaging technologies
  • Chiplets integration: opportunity and challenges
  • Novel enablement ASIC, EDA, and manufacturing tools/materials





SEMI Member
Group Registration
NTD 5,040 NTD 6,300 NTD 5,040 Extra 10% discount
(More than 5 people)

*Tax Included

Sponsored by:








* Forum agenda is subject to change


If SEMI should be unable to hold the exhibition/forum for any cause beyond its reasonable control, SEMI has the right to cancel the exhibit/forum with no further liability than a refund of the ticket price. SEMI shall in no event be liable for incidental or consequential damages to registrants arising from or relating to such cancellation.

For further information, please visit our website. http://www.semicontaiwan.org/en/agenda-glance


Do you want to attend this session? REGISTER NOW!

Mr. Richard Salsman
CFO and Vice President of Operations
Dr. Kuo-Chung Yee
Director General
Taiwan Semiconductor Manufacturing Company Limited
Dr. Subramanian S. Iyer
Distinguished Professor
University of California, Los Angeles
Dr. Douglas Yu
Vice President, Research & Development
Taiwan Semiconductor Manufacturing Company Ltd.
Dr. Subramanian S. Iyer
Distinguished Professor
University of California, Los Angeles
Dr. Eric Beyne
imec fellow / VP R&D / Program Director 3D System Integration
Dr. Jeong-Tyng Li
Vice President of Engineering
Synopsys Inc.
Mr. Calvin Lee
ASE Group
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